自定义博客皮肤VIP专享

*博客头图:

格式为PNG、JPG,宽度*高度大于1920*100像素,不超过2MB,主视觉建议放在右侧,请参照线上博客头图

请上传大于1920*100像素的图片!

博客底图:

图片格式为PNG、JPG,不超过1MB,可上下左右平铺至整个背景

栏目图:

图片格式为PNG、JPG,图片宽度*高度为300*38像素,不超过0.5MB

主标题颜色:

RGB颜色,例如:#AFAFAF

Hover:

RGB颜色,例如:#AFAFAF

副标题颜色:

RGB颜色,例如:#AFAFAF

自定义博客皮肤

-+

TroubleMaker

为天地立心,为生民立命,为往圣继绝学,为万世开太平

  • 博客(8)
  • 资源 (16)
  • 收藏
  • 关注

原创 UVM Tutorial

UVMhttps://www.chipverify.com/uvm/uvm-tutorialhttps://www.verificationguide.com/p/uvm-tutorial.htmlhttp://www.testbench.in/index.htmlhttp://cluelogic.com/category/uvm/https://www.edaplaygrou...

2019-11-06 09:27:59 197

翻译 UVM Tutorial for Candy Lovers – 6. Tasting

The anticipated culmination of the UVM for Candy Lovers series is revealed in this post. Using the created verification components and writing out a test class, the actual simulation is prepared to ru...

2019-11-05 20:56:58 94

翻译 UVM Tutorial for Candy Lovers – 5. Environment

This post will provide a continued explanation on the rest of the verification components.SubscribersFunctional CoverageThe functional coverage subscriber (jelly_bean_fc_sucbscriber) identifies ...

2019-11-05 20:53:27 183

翻译 UVM Tutorial for Candy Lovers – 4. Agent

The last post concentrated on the transactions and sequences of the jelly-bean taster system. This post will explain the verification components in the verification environment further in depth.Inte...

2019-11-05 20:51:15 102

翻译 UVM Tutorial for Candy Lovers – 3. Transactions and Sequences

This post will provide an explanation on the SystemVerilog code itself. Please seeRecipefor the class diagram.TransactionsJelly-Bean TransactionThejelly_bean_transactionclass defines the jel...

2019-11-05 20:45:49 171

翻译 UVM Tutorial for Candy Lovers – 2. Recipe

While the last post clarified the verification components of the jelly-bean taster, this post will provide a focus for the jelly-bean recipe.The jelly-bean recipe is passed as a transaction from the...

2019-11-05 18:36:03 129

翻译 UVM Tutorial for Candy Lovers – 1. Overview

Accellera’s recently released UVM may change the future of verification, as verification methodology seems to be consolidated in this UVM. This post will provide a simple tutorial on this new verifica...

2019-11-05 17:47:55 334

原创 怎么合适地使用Vim保存文件?

本文来自:https://vimjc.com/vim-write-file.html。谢谢原作者Vim使用最频繁的命令之一应该是:w。Vim命令行命令:w是:write的缩写形式,用于将当前Vim缓冲区的内容写到磁盘文件中,即完成保存文件的操作。别小看了这么一个简单又常见的写文件操作,合理地使用Vim命令保存文件也是一个值得深入研究的话题。Vim教程网总结了多种保存文件的Vi...

2019-11-01 16:18:42 137

systemVerilog Assertion应用指南完整版

systemVerilog Assertion应用指南完整版。网上流传的其他版本都不是完整的,这次终于找到了完整的版本,分享给大家。

2018-08-14

APB_SPI_master

本文件可以作为有需求的在校生学习使用,有完整的程序代码。

2018-08-14

Intermediate PERL

Intermediate PERL.

2018-08-14

uvm-cookbook-complete-verification-academy

uvm-cookbook-complete-verification-academy

2019-01-02

AMBA_UVM验证DEMO

AMBA_UVM验证,可以在VCS等仿真工具中进行运行,可以帮助你更好的理解UVM验证平台

2019-01-29

AMBA_APB_I2C

本文件为Verilog文件,适合研习AMBA总线的朋友学习使用。

2018-08-15

电子技术基础:数字部分

benPPT是电子技术基础:数字部分的内容,有兴趣的朋友可以查看。

2019-04-09

uvm_lab.zip

一个demo,关于UVM,完成的design和verification。希望有需要的朋友能看到

2019-10-16

ESL Design and Verification.pdf

ESL Design and Verification: A Prescription for Electronic System Level Methodology

2019-05-17

SVA_ The Power of Assertions in SystemVerilog

Eduard Cerny, Surrendra Dudani, John Havlicek, Dmitry Korchemny (auth.) - SVA_ The Power of Assertions in SystemVerilog-Springer International Publishing (2015)

2018-12-26

AMBA_AHB_DMA

本文件为Verilog文件,适合研习AMBA总线的朋友学习使用。

2018-08-17

sv_lab.zip

一个demo,关于systemverilog,完成的design和verification。希望有需要的朋友能看到

2019-10-16

SystemVerilog Assertions and Functional Coverage_ Guide to Language

Ashok B. Mehta (auth.) - SystemVerilog Assertions and Functional Coverage_ Guide to Language, Methodology and Applications-Springer International Publishing (2016)

2018-12-26

高级项目管理师-项目风险管理论文

高级项目管理师-项目风险管理论文。

2018-11-11

SD_part1_Physical_Layer_spec

SD_part1_Physical_Layer_spec. SD协议_物理层标准 有兴趣可以一起学习

2018-10-18

算法之道_第二版全目录

算法之道,事关算法。有兴趣的朋友可以阅读下载。谢谢!

2018-11-04

空空如也

空空如也

TA创建的收藏夹 TA关注的收藏夹

TA关注的人 TA的粉丝

提示
确定要删除当前文章?
取消 删除